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Research
Next-Generation HPC Infrastructure Development Division
Advanced HPC Technologies Development Unit
Advanced HPC Technologies Development Unit
Japanese
Unit Leader Kento Sato
kento.sato[at]riken.jp (Lab location: Kobe)- Please change [at] to @
- 2025
- Unit Leader, Advanced HPC Technologies Development Unit, Next-Generation HPC Infrastructure Development Division, RIKEN R-CCS (-present)
- 2024
- Unit Leader, Data Management Platform Development Unit, AI for Science Platform Division, RIKEN R-CCS (-present)
- 2018
- Team leader, High Performance Big Data Research Team, RIKEN R-CCS (-present)
- 2018
- Invited Senior Researcher, RWBC-OIL, National Institute of Advanced Industrial Science and Technology (AIST), Japan.
- 2017
- Invited Senior Researcher, RWBC-OIL, National Institute of Advanced Industrial Science and Technology (AIST), Japan.
- 2017
- Computer Scientist, Center for Applied Scientific Computing (CASC), Lawrence Livermore National Laboratory (LLNL), USA.
- 2014
- Postdoctoral Researcher, Center for Applied Scientific Computing (CASC), Lawrence Livermore National Laboratory (LLNL), USA.
- 2014
- Postdoctoral Researcher, Global Scientific Information and Computing Center (GSIC), Tokyo Institute of Technology, Japan
- 2014
- Ph.D. in Science, Department of Mathematical and Computing, Tokyo Institute of Technology, Japan.
Keyword
- Next-Generation HPC Infrastructure Development
- Architecture
- System Software
- Application
Research summary
Advanced computing infrastructure plays a crucial role in realizing Society 5.0 and the Sustainable Development Goals (SDGs). By integrating digital twins technologies with AI-driven simulations, it is essential to accelerate research digital transformation (DX) beyond the capabilities of next-generation computing systems. This integration enables seamless collaboration between deductive simulations, inductive simulations, and large-scale data analysis, thereby driving scientific and technological innovation. With the end of Moore’s Law, achieving higher performance through traditional computing infrastructure extensions has become increasingly challenging. To overcome this, new architectures that significantly enhance performance and power efficiency are indispensable. In particular, moving beyond FLOPS-centric design, the key lies in optimizing data movement and maximizing energy efficiency.
The Advanced HPC Technologies Development Unit conducts research and development on essential technologies for building advanced computing infrastructure, including feasibility studies. On the architectural side, we aim to develop massively-parallel and highly scalable computing architectures by integrating cutting-edge technologies such as high-density 3D-stacked memory, optical communication between chips by silicon photonics, and quantum-HPC hybrid computing. On the system software side, our focus is on pioneering system software technologies that leverage AI across a broad range of fields to enhance usability, optimize performance, and enable AI-driven operations (e.g., resource management and data utilization platforms). Additionally, we promote co-design with applications to fully leverage the potential of advanced computing infrastructure.
Furthermore, in collaboration with industry and international research institutions, we advance feasibility studies on versatile and sustainable advanced computing infrastructure, laying the foundation for the computing platforms that will support future society.
Main research results
The roofline model has been used to analyze theoretical and actual performance of computer systems. In the roofline model, the memory access intensity of each application is modeled as a B/F (bytes per flop) number, i.e., the amount of data transferred from/to memory when executing one floating-point operation. The roofline model can clearly illustrate whether performance bottleneck is located at the computation speed of a computer, at its memory bandwidth, or at another unknown component. Even in the case that memory latency is primary bottleneck, the roofline model cannot pinpoint it. Our memory emulator, METICULOUS, allowing users to set memory latency and bandwidth independently, makes it possible to discuss how latency and bandwidth have impact on system performance. It is useful to explore the design space of a memory subsystem covering both the system software and hardware layers. We evaluated sensitivity of two benchmarks (BabelStream and XSBench) to memory latency and bandwidt. The results will contribute to finding an optimal balance between the memory bandwidth and latency in the hardware design of a memory subsystem and also suggesting implications to design an algorithm of memory management performed at the system software layer.
Representative papers
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Ryubu Hosoki, Kento Sato, Toshio Endo, Julien Bigot, Edouard Audit
“An Optimization Technique for Hiding Communication Costs in 3D Parallelism”
In the proceedings of The IEEE International Symposium on Cluster, Cloud, and Internet Computing (CCGrid 2025), May, 2025 -
Xiang Fu, Shiman Meng, Weiping Zhang, Luanzheng Guo, Kento Sato, Dong H. Ahn, Ignacio Laguna, Gregory L. Lee, Martin Schulz
“Distributed Order Recording Techniques for Efficient Record-and-Replay of Multi-threaded Programs”
IEEE Cluster 2024, Kobe, Hyogo, Japan -
Ana Luisa Veroneze Solorzano, Kento Sato, Devesh Tiwari, Keiji Yamamoto, Jim Brandt, Benjamin Schwaller, Sara Petra Walton, Jennifer Green, Fumiyoshi Shoji
"Toward Sustainable HPC: In-Production Deployment of Incentive-Based Power Efficiency Mechanism on the Fugaku Supercomputer"
SC ’24: Proceedings of the International Conference on High Performance Computing, Networking, Storage and Analysis, Atlanta, GA, USA. -
Taiyu Wang, Qinglin Yang, Kaiming Zhu, Junbo Wang, Chunhua Su, Kento Sato
"LDS-FL: Loss Differential Strategy based Federated Learning for Privacy Preserving"
IEEE Transactions on Information Forensics and Security, doi: 10.1109/TIFS.2023.3322328. ,2023 -
Xiang Fu, Weiping Zhang, Xin Huang, Wubiao Xu, Shiman Meng, Luanzheng Guo, Kento Sato
"AutoCheck: Automatically Identifying Variables for Checkpointing by Data Dependency Analysis"
SC ’24: Proceedings of the International Conference on High Performance Computing, Networking, Storage and Analysis, Atlanta, GA, USA. -
Satoru Hamamoto, Masaki Oura, Atsuomi Shundo, Daisuke Kawaguchi, SatoruYamamoto, Hidekazu Takano, Masayuki Uesugi, Akihisa Takeuchi, Takahiro Iwai, Yasuo Seto, Yasumasa Joti, Kento Sato, Keiji Tanaka & Takaki Hatsui
"Demonstration of efficient transfer learning in segmentation problem in synchrotron radiation X-ray CT data for epoxy resin"
Science and Technology of Advanced Materials: Methods, DOI: 10.1080/27660400.2023.2270529, 2023 -
Takahiro Hirofuchi, Takaaki Fukai, Akram Ben Ahmed, Ryousei Takano and Kento Sato
"METICULOUS: An FPGA-based Main Memory Emulator for System Software Studies"
Sep., 2023, arXiv:2309.06565 -
Akihiro Tabuchi, Koichi Shirahata, Masafumi Yamazaki, Akihiko Kasagi, Takumi Honda, Kouji Kurihara, Kentaro Kawakami, Tsuguchika Tabaru, Naoto Fukumoto, Akiyoshi Kuroda, Takaaki Fukai and Kento Sato
"The 16,384-node Parallelism of 3D-CNN Training on An Arm CPU based Supercomputer"
28th IEEE International Conference on High Performance Computing, Data, and Analytics (HiPC2021), Nov, 2021 -
Steven Farrell, Murali Emani, Jacob Balma, Lukas Drescher, Aleksandr Drozd, Andreas Fink, Geoffrey Fox, David Kanter, Thorsten Kurth, Peter Mattson, Dawei Mu, Amit Ruhela, Kento Sato,,Koichi Shirahata, Tsuguchika Tabaru, Aristeidis Tsaris, Jan Balewski, Ben Cumming, Takumi Danjo, Jens Domke, Takaaki Fukai, Naoto Fukumoto, Tatsuya Fukushi, Balazs Gerofi, Takumi Honda, Toshiyuki Imamura, Akihiko Kasagi, Kentaro Kawakami, Shuhei Kudo, Akiyoshi Kuroda, Maxime Martinasso, Satoshi Matsuoka, Kazuki Minami, Prabhat Ram, Takashi Sawada, Mallikarjun Shankar, Tom St. John, Akihiro Tabuchi, Venkatram Vishwanath, Mohamed Wahib, Masafumi Yamazaki, Junqi Yin and Henrique Mendonca
"MLPerf HPC: A Holistic Benchmark Suite for Scientific Machine Learning on HPC Systems"
The Workshop on Machine Learning in High Performance Computing Environments (MLHPC) 2021 in conjunction with SC21, Nov, 2021 -
Rupak Roy, Kento Sato, Subhadeep Bhattacharya, Xingang Fang, Yasumasa Joti, Takaki Hatsui, Toshiyuki Hiraki, Jian Guo and Weikuan Yu
"Compression of Time Evolutionary Image Data through Predictive Deep Neural Networks"
In the proceedings of the 21 IEEE/ACM International Symposium on Cluster, Cloud and Internet Computing (CCGrid 2021), May, 2021
