R-CCS Cafe 第285回（2026年2月5日）

トップページイベント・広報 R-CCS Cafe R-CCS Cafe 第285回（2026年2月5日）

詳細
開催日	2026年2月5日(木)
開催時間	15:00 - 16:30（15:00 - 16:00　講演者3名による講演、16:00~　自由討論（参加自由））
開催都市	兵庫県神戸市／オンライン
場所	計算科学研究センター（R-CCS）6階講堂／Zoomによる遠隔セミナー R-CCS外部の方で参加希望の場合は r-ccs-cafe[at]ml.riken.jp までご連絡ください。
使用言語	発表・スライド共に英語
登壇者	Amrit Sarmah 量子系分子科学研究チーム研究員 Zeqing Wang 量子系物質科学研究チーム特別研究員 Yanchen Li 次世代AIデバイス開発研究ユニット特別研究員

講演題目・要旨

1st Speaker: Amrit Sarmah

Title:

Reversible Plastic: Chemical Tuning of Salt-Bridge Effect using Simulation Techniques

Abstract:

Conventional plastics, built on irreversible covalent bonds, contribute to long-term environmental pollution. Reversible supramolecular plastics based on phosphate–guanidinium salt bridges offer a sustainable alternative: they are mechanically robust, synthesized in one step from natural precursors, and fully dissociate into metabolizable monomers in salty water. Using computational methods, we examine how electronic tuning of the guanidinium cation—via substituents with varying electron-donating or -withdrawing character—affects salt-bridge stability. Energy decomposition analysis shows that electrostatics provide the main stabilization, while Pauli repulsion is the dominant destabilizing factor; polarization fine-tunes overall binding strength. We also investigate responses to external electric fields: systems with higher polarizability (e.g., SB4) exhibit significant field-induced stabilization, whereas rigid systems (e.g., SB1) show minimal change. These results establish design principles for smart, reversible plastics—balancing geometric optimization to reduce repulsion and incorporating polarizable groups to enhance responsiveness. Such materials combine mechanical strength, environmental degradability, and tunable electronic behavior, supporting a circular and intelligent polymer economy.

2nd Speaker: Zeqing Wang

Title:

Simulating the Dynamics of Markovian Quantum Processes by Quantum Collision Models on Quantum Computers

Abstract:

Many Hamiltonian dynamics have been implemented on noisy intermediate-scale quantum (NISQ) devices in recent years. In contrast, experimental demonstrations of Markovian quantum process dynamics remain limited due to the non-unitary evolution on hardware being challenging. Quantum collision models provide a natural approach by coupling the system to ancillas to realize dissipation. However, as far as we know, previous implementations have typically been restricted to one or two system qubits and fewer than ten time steps due to noise, circuit depth, overhead of ancilla reset, and limited qubit resources. In this work, we realized up to seven system qubits with two-body dissipation for 40 time steps by applying different ancilla strategies for superconducting and trapped-ion platforms. This indicates that, even for the same physical model, different strategies should be chosen for different platforms according to their properties.

3rd Speaker: Yanchen Li

Title:

Toward General-Purpose CGRAs: A Benchmarking Framework for CGRAs on HPC Applications

Abstract:

Coarse-grained reconfigurable arrays (CGRAs) offer a promising architecture for edge computing applications. They provide higher power and area efficiency than graphics processing units (GPUs) while maintaining greater flexibility than application-specific integrated circuits (ASICs). When developing CGRA kernels, we map the data-flow graph (DFG) onto the PE array, typically organized as a 2D square grid.

Previous studies have designed CGRAs optimized for specific applications, sizing the PE array to maximize throughput for particular kernels. However, designing and fabricating application-specific CGRAs consumes substantial human and material resources. General-purpose CGRAs for high-performance computing (HPC) applications are therefore necessary. This raises two key questions: What is the optimal PE array size, and which HPC applications suit the CGRA architecture?

In this research, we propose a benchmarking framework for evaluating CGRAs on HPC applications and address these questions through systematic experiments. We unroll CGRA kernels until they reach the array's capacity, then assess latency and throughput characteristics through metrics we define for this evaluation. Our results indicate that, under the current RIKEN CGRA architecture, increasing array size consistently improves throughput. However, the CGRA's relatively limited bandwidth constrains PE utilization, presenting a critical challenge for future development.

注意事項

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（2026年1月30日）