理化学研究所 計算科学研究センター

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R-CCS Cafe

R-CCS Cafe は、異分野融合のための足掛かりとして、計算科学研究センター(R-CCS)に集う研究者が井戸端会議的にざっくばらんに議論する場として、毎月2回程度予定しております。興味をお持ちの方は原則どなたでも参加可能です。

  • 目 的: 異分野間の壁を超えた研究協力を促進し、新しい学問分野の開拓を目指すため、 研究者間の情報交換・相互理解の場を提供し、研究協力のきっかけを作る。
  • 会 場:R-CCS 6階講堂もしくは1階セミナー室
  • 言 語:講演は日本語/英語、スライドは英語
  • その他:講演者は他分野の方にも理解できる発表を心掛け、参加者は積極的に質問しましょう。

第179回 第1部
日時: 2019年8月22日(木)、14:00 - 14:40
場所: R-CCS 6階講堂

・講演題目: The First Supercomputer with HyperX Topology: A Viable Alternative to Fat-Trees?
・講演者: Jens Domke(高性能ビッグデータ研究チーム)
※発表・スライド共に英語

講演要旨: 詳細を見る

The state-of-the-art topology for modern supercomputers are Folded Clos networks, a.k.a. Fat-Trees. The node count in these massively parallel systems is steadily increasing. This forces an increased path length, which limits gains for latency-sensitive applications. A novel, yet only theoretically investigated, alternative is the low-diameter HyperX. To perform a fair side-by-side comparison between a 3-level Fat-Tree and a 12x8 HyperX, we constructed the world’s first 3 Pflop/s supercomputer with these two networks. We show through a variety of benchmarks that the HyperX, together with our novel communication pattern-aware routing, can challenge the performance of traditional Fat-Trees.

第179回 第2部
日時: 2019年8月22日(木)、14:40 - 15:20
場所: R-CCS 6階講堂

・講演題目: Modelizing communication hiding for high-performance strong scaling
・講演者: Masatoshi Kawai(利用高度化研究チーム)
※発表・スライド共に英語

講演要旨: 詳細を見る

Communication hiding is a well-known approach for realizing the higher performance of applications. Especially, to get ideal parallel performance with strong scaling, effective communication hiding essential. However, in some applications, we can not hide communications as we expect. In this study, we modelize communication hiding for each application and system. By this model, we judge the communication hiding is useful or not. In this talk, we discuss the validity of the model with general stencil problems.

第178回 第1部
日時: 2019年8月5日(月)、13:00 - 13:55
場所: R-CCS 6階講堂

・講演題目: Large-scale simulation of cortico-cerebello-thalamo-cortical circuit on the K computer
・講演者: 五十嵐 潤(情報システム本部計算工学応用開発ユニット)
※発表・スライド共に英語

講演要旨: 詳細を見る

Whole-brain simulation allows us to understand full interactions among neurons and helps elucidate brain function and disease. However, it has not been realized due to the insufficient computational power of current supercomputers and lack of experimental data of the brain. In this study, we propose an efficient and scalable parallelization method for whole-brain simulation executed on next-generation supercomputers. We focus on the biological features of the brain that major brain parts of the cortex and cerebellum form layered sheet structure with local-dense and remote-sparse connections. To exploit the biological features, our proposed method combines tile-partitioning method and communication method using synaptic transmission delay. Our proposed method showed good weak scaling performance for simulation of the cortex, cerebellum, and cortico-cerebello-thalamo-cortical circuits on the K computer. These results suggest that the size of the model may scale to human brain size on Fugaku computer. The whole-brain simulation on next-generation supercomputers may lead to a new paradigm of brain research.

第178回 第2部
日時: 2019年8月5日(月)、13:55 - 14:50
場所: R-CCS 6階講堂

・講演題目: Recent Progress on Big Data Assimilation in Numerical Weather Prediction
・講演者: 三好 建正(データ同化研究チーム、チームリーダー)
※発表・スライド共に英語

講演要旨: 詳細を見る

The Big Data Assimilation (BDA) project in numerical weather prediction (NWP) started in October 2013 under the Japan Science and Technology Agency (JST) CREST program, and ended its 5.5-year period in March 2019. The direct follow-on project was accepted and started in April 2019 under the JST AIP Acceleration Research, with emphases on the connection with AI technologies, in particular, an integration of DA and AI with high-performance computation (HPC). The BDA project aimed to fully take advantage of “big data” from advanced sensors such as the phased array weather radar (PAWR) and Himawari-8 geostationary satellite, which provide two orders of magnitude more data than the previous sensors. We have achieved successful case studies with newly-developed 30-second-update, 100-m-mesh NWP system based on the RIKEN’s SCALE model and local ensemble transform Kalman filter (LETKF) to assimilate PAWR in Osaka and Kobe. We have been actively developing the workflow for real-time weather forecasting. In addition, we developed two precipitation nowcasting systems with the every-30-second PAWR data: one with an optical-flow-based system, the other with a deep-learning-based system. We chose the convolutional Long Short Term Memory (Conv-LSTM) as a deep learning algorithm, and found it effective for precipitation nowcasting. The use of Conv-LSTM would lead to an integration of DA and AI with HPC. This presentation will include an overview of the BDA project toward a DA-AI-HPC integration under the new AIP Acceleration Research scheme, and recent progress of the project.

第178回 第3部
日時: 2019年8月5日(月)、15:05 - 16:00
場所: R-CCS 6階講堂

・講演題目: Extending Supercomputers with FPGA-based Custom Computing Machine
・講演者: 佐野 健太郎(プロセッサ研究チーム、チームリーダー)
※発表・スライド共に英語

講演要旨: 詳細を見る

Custom computing with dedicated circuits on FPGAs (Field-Programmable Gate Arrays) is promising to accelerate computation that general-purpose multi-core processors are not good at. In our team, we have developed a system with Intel's 14nm Stratix10 FPGAs and a data-flow compiler which generates a pipelined custom hardware module to be embedded onto an FPGA and executed as stream computing. In this talk, I introduce the system including FPGA's dedicated network subsystem, the data-flow compiler, and expected applications to be off-loaded to FPGAs, as well as challenges to be tackled in our project. Finally, I discuss what a future supercomputer should be in the Post-Moore era.

Biography: Dr. Kentaro Sano received his Ph.D. from GSIS, Tohoku University, in 2000. Since 2000 until 2005, he had been a Research Associate at Tohoku University. Since 2005 until 2018, he has been an Associate Professor at Tohoku University. He was a visiting researcher at the Department of Computing, Imperial College, London, and Maxeler corporation in 2006 and 2007. Since 2017 until present, he has been a team leader of a processor research team at R-CCS, Riken. His research interests include FPGA-based high-performance reconfigurable computing systems especially for scientific numerical simulations and machine learning, high-level synthesis compilers and tools for reconfigurable custom computing machines, and system architectures for next-generation supercomputing based on the data-flow computing model.

第178回 第4部
日時: 2019年8月5日(月)、16:00 - 16:55
場所: R-CCS 6階講堂

・講演題目: Importance of turbulence process with cloud ~ Toward global large eddy simulation model ~
・講演者: 富田 浩文(複合系気候科学研究チーム、チームリーダー)
※発表・スライド共に英語

講演要旨: 詳細を見る

In K computer era, the global cloud resolving model was established to some extent. Computational Climate Research Team aims now development of a next-generation climate model with super-high resolution, which explicitly resolves the phenomena, based on more principle theoretical modeling. In such model, a key process is expression of turbulence in rotating stratified fluid. Furthermore, it tightly interacts with cloud condensation. After brief introduction of the team aim, we give a talk about the past achievement and future plan, focusing on the turbulence modeling.

第177回
日時: 2019年7月31日(水)、14:00 - 15:30
場所: R-CCS 1階セミナー室

・講演題目: Global Collaboration to Improve HPC Energy Efficiency
・講演者: Natalie Bates(Energy Efficient HPC Working Group)
※発表・スライド共に英語

講演要旨: 詳細を見る

The purpose of the Energy Efficient HPC Working Group (EE HPC WG) is to promote energy efficiency in HPC. The EE HPC WG develops best practices for maximizing energy efficiency in HPC facilities and systems. It provides a venue for sharing of information (peer-to-peer exchange) and collective action. The EE HPC WG is cross-disciplinary and encourages interaction between facilities, operations and computational science organizations.
The EE HPC WG has a strong presence in the United States and Europe, with a growing presence in Japan. The Japanese HPC centers have a lot of innovative technologies and approaches that work towards improving HPC energy efficiency. The United States and European HPC centers would like to learn more about their Japanese counterparts.
The purpose of this seminar is to promote further collaboration between the United States, Europe and Japan within the EE HPC WG. This seminar will describe the EE HPC WG. It will describe areas where Japanese HPC centers have already contributed to the EE HPC WG. The seminar will be informational, but will also allow for discussion and exploration of further collaborative opportunities.
Below are some of the EE HPC WG Teams that will be discussed in this seminar. Some of the Teams focus more on HPC systems and others more on HPC facilities, but none of them are exclusively one or the other..
• _Energy and Power Aware Job Scheduling and Resource Management:_ This team did a global survey of sites deploying the emerging EPA JSRM technologies to evaluate what they are doing and trying to accomplish. Three papers were published. The team is currently investigating site policies for EPAJSRM with a view towards optimization techniques.
• _Operational Data Analytics:_ This team has published 3 case studies and is doing a global survey to evaluate the benefits and challenges of instrumentation, data collection and analytics for facility operations, including data from HPC systems.
• _System Power Measurement Methodology:_ The Green500 and Top500 power measurement methodology has been made more rigorous, consistent and higher quality as a result of this Team. The team is still working on promoting the use of the highest quality measurements.
• _Grid Integration:_ Demand Response for the electric grid was the initial focus of this team and two papers were published describing how sites were reacting to demand response opportunities from their electricity service providers. The Team is now focused on rapid and extreme voltage fluctuations from HPC systems and the impact that might have on the electric grid. It has done a limited site survey and published a short paper on this topic. Further investigation is underway.

第176回 第1部
日時: 2019年7月26日(金)、10:15 - 11:00
場所: R-CCS 6階講堂

・講演題目: Composability and Scalability in Large-Scale Supercomputing through Modularity
・講演者: Thomas Lippert(Prof. Dr./Director of the Institute for Advanced Simulation, Head of Jülich Supercomputing Centre)
※発表・スライド共に英語

講演要旨: 詳細を見る

The leading supercomputers in the Top 500 list are based on a traditional, monolithic architectural approach. They all use complex nodes consisting of different elements such as CPUs and GPUs or FPGAs with common I/O interfaces. It is a well-known difficulty with such systems that one often encounters underutilization, because the more complex the node, the more prone the overall system becomes to inefficiencies. A second problem is the cost of scalability, because a node must be able to perform very complex calculations for problems that are often not scalable, and the same node must perform scalable calculations for problems that would not require such complex nodes. This make the system extremely costly. A third difficulty is the composability of resources, as for instance future computing systems like quantum computers. In order to try solving these problems, we propose a disaggregation of resources and their dynamic recomposition by a programming paradigm called modular supercomputing. We motivate the approach by relying on computer-theoretical considerations for a generalization of Amdahl's law. We present arguments for for the usefulness of modularity for important applications such as Earth System simulations, continuous learning and data analysis problems. FInally, we are presenting first results of test problems.

第176回 第2部
日時: 2019年7月26日(金)、11:00 - 11:45
場所: R-CCS 6階講堂

・講演題目: Supercomputing and Service Oriented Architectures
・講演者: Thomas Schulthess(Prof. Dr./Director of the Swiss National Supercomputing Centre)
※発表・スライド共に英語

講演要旨: 詳細を見る

In modern science there is a need for developing extreme-scale computing infrastructures towards support for workflows with complex computing and data requirements. In order to simplify the experience of scientists using the infrastructure and minimizing the need for large movements of data, a combination of capability, throughput as well as interactive computing services have to be offered in a transparent way. In this talk, I will show how CSCS is improving its service portfolio, which is rooted in traditional supercomputing operations, towards a service-oriented architecture (SOA) that use many of the virtues of native cloud computing. Key technologies such as interactive notebooks, containers for software deployment and their orchestration, as well as web-accessible supercomputing infrastructure will be discussed. I will review recent experiences of CSCS in covering needs of the User Lab (traditional supercomputing operations), the Swiss Institute of Particle Physics (CHIPP, the Swiss part of the World LHC Computing Grid), as well the Materials Cloud platform and the HBP Collaboratory (a platform of the Human Brain Project). Looking at this from a SOA point of view is allowing us to evolve our supercomputing systems to meet the needs of modern science.

第175回 第1部
日時: 2019年7月22日(月)、15:30 - 16:10
場所: R-CCS 6階講堂

・講演題目: Building an FPGA cluster for application acceleration
・講演者: 宮島 敬明 (プロセッサ研究チーム 特別研究員)
※発表・スライド共に英語

講演要旨: 詳細を見る

In this talk, I will give you an research topic about network subsystem for FPGA cluster. A heterogeneous system with Field Programmable Gate Array (FPGA) is gathering attention in High-Performance Computing (HPC) area. When FPGA is used as an accelerator attached to the host CPU, there can be many configurations such as network topology to construct FPGA cluster. Sustained data transfer bandwidth between FPGA memory and CPU memory on a distant node is one of the most important factors to decide a topology of FPGA cluster. In order to explore the best topology, a quantitative evaluation of bandwidth is required. We conducted bandwidth measurement on two host nodes both nodes are connected via 100Gbps InfiniBand cable and one host node has PCIe Gen3 x8-based FPGA accelerator card. We implemented a Direct Memory Access (DMA) function on an FPGA-attached node and a software bridged data transfer function to transfer data between two nodes. The result shows that DMA function and software bridged data transfer function achieve 82.2% and 69.6% of the theoretical bandwidth of PCIe Gen3 x8, a bottleneck of data transfer path, respectively.