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Title

High-performance numerical library and numerical reproducibility

Details
Date Mon, Jul 1, 2019
Time 1:55 pm - 2:50 pm
City Kobe, Japan
Place

Lecture Hall (6th floor) at R-CCS

Language Presentation Language: English
Presentation Material: English
Speakers

Toshiyuki Imamura

Team Leader, Large-scale Parallel Numerical Computing Technology Research Team

photo: Toshiyuki Imamura

Abstract

As it is the second round on the PI progress report on R-CCS Café, two research topics are selected from the recent outstanding results and the future project. First, the most outstanding result of my team activities was that Dr. Kudo won the best paper award in HPC Asia 2019, Guangzhou, China. The main contribution of his paper was dedicated to accelerating a very compact and scalable eigenvalue solver on several types of manycore processors. His main idea was to reconstruct carefully but boldly any part of the implementation by introducing a systematic code generator to achieve performance portability and future extensibility. What is more, another idea to incorporate the “BLAS+X” approach improved the TRD algorithm (Householder tridiagonalization) and extended the functionality of TRD beyond the batch operations. The second topic is that new research pillar of “numerical reproducibility”. This is a new concept and approach to guarantee numerical precision on any software and hardware configurations. This project is based on several mathematical theories and hardware/software/algorithmic supports of higher precision arithmetic. In this project, we intend to guarantee input/output numerical reproducibility. Internally, we secure the numerical accuracy fully 64bit or necessary precision (bit fields) by a stochastic approach with CADNA and PROMISE developed by the LIPS6 group, France. Naturally, as the rounding error contaminates any floating calculations, we must extend the internal data format with a much wider one, for example, IEEE754 real128 or other individual floating point formats. We are going to overcome this difficulty by incorporating the arithmetic engine of the FPGA. Furthermore, we need to investigate software emulation of a wider precision floating point format and higher precision algorithms. I would like to introduce these topics at the next R-CCS Café briefly.

(Jun 27, 2019)